Lucas Koerner

Research

I'm a seventh year graduate student in physics at Cornell University in Ithaca NY. I work on x-ray detectors for biological and materials studies. We develop high speed x-ray detectors with readout chips that are designed in commercial CMOS processes. Our research combines physics, biology, electrical engineering, and x-ray science.

In collaboration with Professor Todd Hufnagel's group at Johns Hopkins University we have used a microsecond framing x-ray detector and a high flux x-ray beam to follow the phase tranformations of self-propagating reaction fronts in nanostructured multilayer foils (image on left). The reaction front moves through the sample at meters per second and heats the sample to >1400 C. The x-ray detector images the powder diffraction signal from 50 microseconds to hundreds of milliseconds after the passage of the reaction front. Such timing resolution is not possible with standard x-ray detector technology. These studies provide information on phase transformations in the presence of high heating rates and large concentration gradients.

We are developing a detector for a single molecule experiment at the X-ray free electron laser being built at Stanford University. The experiment proposes to image the scattering from single molecules. The detecor in development has a 120 Hz readout rate and single photon sensitivity. A large area detector chip (194x185 pixels - image on left) has been fabricated and tested with x-rays.

I'm working on development of a new CMOS based microsecond framing x-ray detector. A main design goal is for timing resolution sufficient to isolate single electron bunches from synhcrotron sources. A die photograph is shown on the left (measures ~ 3 mm x 3 mm). The test results will be discussed in an upcoming article in IEEE Transactions on Nuclear Science.

The second CMOS prototype for the microsecond imager is back from Mosis. The effort for this submission is focused on the development of support electronics surrounding the chip to make a 16x16 pixel camera. The chip is controlled by an Opal Kelly FPGA board (Xilinx Spartan 3 FPGA) with HDL written in Verilog. The analog outputs of the chip are digitized by 14-bit ADCs on the support PCB. The ADC output data is buffered by the FPGA into SDRAM on the Opal Kelly board to allow for rapid framing. An image of the chip and support PCB in the probe station is shown below (the FPGA board is below the support PCB and hidden from view).